1. Field of the Invention
The present invention relates to a method for examining an electrical property of a silicon carbide wafer (also referred to as “SiC wafer” or “silicon carbide semiconductor wafer”) and a device for the same.
2. Description of Related Art
In a manufacturing line for forming a semiconductor element on a silicon wafer, the electrical property of the silicon wafer is measured in order to maintain uniform quality. More specifically, an epitaxial layer (epilayer) is grown on the silicon wafer, and the electrical property of the epilayer is measured. The electrical property is typically the resistivity of the epilayer or the resistance value in a predetermined distance in the epilayer.
A four-point probe method has been known as a method for measuring the electrical property of a wafer. This method is performed as follows. Four probes are first brought into contact with a silicon wafer on which the epilayer is grown at prescribed intervals in a straight line. Current is then applied to the two outer probes, and the voltage between the two inner probes is measured. Given that the flowing current is I, the measured voltage is V, and the distance between the probes is L, resistivity R can be obtained by an equation, R=2πLV/I. Such a method is disclosed in Japanese Patent Application Publication No. 2011-138899 (JP 2011-138899 A).
As another method for measuring the electrical property of a wafer, a method has been known in which a small electrode pad dedicated to measurement is formed on a wafer. Such an electrode pad for measurement is referred to as “Test Element Group (TEG)” (Japanese Patent Application Publication No. 2012-069567 (JP 2012-069567 A)).
The four-point probe method of the related art may not be able to accurately measure the electrical property depending on a kind of the silicon wafer (or properties of a layer formed in a wafer shape). A typical case of such is where the resistivity between the probes and the wafer depends on the magnitude or direction of the applied current or voltage. Independence of the resistivity from the magnitude or direction of the applied current or voltage is referred to as “ohmic characteristic”. In other words, a linear relationship between current and voltage (Ohm's law) substantially holds in the ohmic characteristic. The resistance value between two materials (the probes and the wafer) may become more or less non-linear according to the voltage and the current; however, contact that allows a substantial linear relationship to hold is referred to as “ohmic contact”. Because the sufficient ohmic characteristic cannot be secured between the probes and the wafer depending on a kind of the silicon wafer, the electrical property of the epilayer may not be accurately measured.
One of the wafers in which the ohmic characteristic cannot be secured only by bringing the probes into contact is a silicon carbide wafer (also referred to as “SiC wafer” or “silicon carbide semiconductor wafer”). The silicon carbide wafer has recently been used for a power element. As exemplified in JP 2012-069567 A, it is considered to form a TEG on the wafer and thereby measure the electrical property in order to measure the electrical property of the silicon carbide wafer. However, formation of the TEG requires large cost.